Modeling Spiking neural networkS on Spinnaker By

نویسندگان

  • Xin Jin
  • Mikel Luján
  • Luis A. Plana
  • Sergio Davies
  • Steve B. Furber
چکیده

D espite an increasing amount of experimental data and deeper scientific understanding, deciphering the inner workings of biological brains remains a grand challenge. Investigations into the human brain’s microscopic structure have shown that neuron cells are the key components in the cortex. Each individual neuron is physically very much like other cells in our body, but it’s different in that it interacts with other neurons by receiving or sending electrical pulses, or spikes. Researchers have proposed several mathematical models to describe the biological process of neurons firing spikes. These vary in their computational complexity as well as their fidelity, while maintaining biological plausibility. The spike is a common first class of abstraction among these various mathematical models. Spike events are communicated to all connected neurons, with typical fan-outs on the order of 103. Computational modeling of spiking neurons has abundant parallelism and no explicit requirement for cache coherent shared memory. Thus, researchers can use large supercomputing systems and high-performance computing clusters for this kind of simulation.1 However, spike communication stresses standard HPC clusters and networks, making them unsuitable for real-time simulation. In SpiNNaker, our treatment of spikes is a key innovation implemented with application-specific hardware: a multicast, packet-switched and selftimed communication fabric with on-chip routers. To maintain flexibility and generality, the neuronal models run in software on embedded ARM968 processors. These neuronal models communicate by means of spike packets directly supported by the SpiNNaker architecture. We taped out the SpiNNaker test chips in 2009 with the batch arriving in Manchester in December. As Figure 1 shows, these test chips are fully functional SpiNNaker chips but have a highly reduced core count: only two cores per chip. Here, we offer an overview of our research project and describe the first experiments with these test chips running spiking neurons based on Eugene Izhikevich’s model.2 Note that we’re not targeting artificial neural networks (such as perceptrons or multilayer networks) that were inspired by, but don’t model, biologically plausible neural systems.

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تاریخ انتشار 2010